Virtual memory

uses the top 1GB of virtual address space.

Each user space process gets the lower 3GB of virtual address space.

virtual addresses = 256*X + 0..255.

All the arrows shown here are in a single page.

A page can be a standard size (a few KB), large (a few MB), or huge (afew GB).

2

Translation lookasidge buffers (TLBs) and page tables map whole pages intact into the physical address space.

Relative page order in the physical address space is usually irrelevant.

3

If this were a card game, interleaving 256-byte cards to memory controller players.

used are locked, fixed, or wired pages. For example, interrupt mechanisms rely on an array of pointers to their handlers, such as I/O completion and page fault.

Data buffers that are accessed directly by peripheral devices that use direct memory access or I/O channels must reside in pinned pages while the I/O operation in progress because such devices and the buses to wich they are attached expect to find data buffers located at physical memory addresses; regardless of whether the bus has a memory management unit for I/O , transfers cannot be stopped if a page fault occurs and then restarted when the page faault has been processed.