Содержание
- 2. The ‘old’ way In order to appreciate the benefits of using Message Signaled Interrupts, let’s first
- 3. Multi-step communication A device signals that it needs CPU service The Interrupt Controller signals the CPU
- 4. Faster, cheaper, and more Faster response to interrupts is possible if the old multi-step communication scheme
- 5. The ‘new’ way Message Signaling allows all the needed information to arrive in a single package,
- 6. Implementation The customary PCI Configuration Space is modified to accommodate three additional registers, which collectively are
- 7. PCI Command Register 15 10 9 8 7 6 5 4 3 2 1 0 Interrupt
- 8. PCI Status Register 15 14 13 12 11 10 9 8 7 6 5 4 3
- 9. MSI Control Register reserved 1 0 0 0 0 0 0 0 15 8 7 6
- 10. MSI Address Register 0 0 0 0 0 0 0 0 0 0 0 0 0
- 11. MSI Data Register reserved reserved 31 16 15 14 11 8 7 0 vector Delivery Mode
- 12. Recall NIC’s interrupt registers enum { E1000_ICR = 0x00C0, // Interrupt Cause Read E1000_ICS = 0x00C8,
- 13. Demo module: ‘msidemo.c’ This module installs an interrupt-handler for an otherwise unused interrupt-vector It initializes the
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